Logical Effort: Designing Fast CMOS Circuits - The Morgan Kaufmann Series in Computer Architecture and Design - Ivan Sutherland - Books - Elsevier Science & Technology - 9781558605572 - February 2, 1999
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Ivan Sutherland
Logical Effort: Designing Fast CMOS Circuits - The Morgan Kaufmann Series in Computer Architecture and Design 1st edition

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Includes chapters that explore the theory and finer points of logical effort method and detail its specialized applications. This book offers coverage of specialized areas of application for logical effort: skewed or unbalanced gates, other circuit families, wide structures such as decoders, and irregularly forking circuits.

256 pages

Media Books     Paperback Book   (Book with soft cover and glued back)
Released February 2, 1999
ISBN13 9781558605572
Publishers Elsevier Science & Technology
Pages 256
Dimensions 185 × 10 × 230 mm   ·   408 g
Language English  

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